There are many different types of computer memory devices including random-access memory (RAM), read-only memory (ROM), synchronous dynamic random-access memory (SDRAM), dynamic random-access memory (DRAM), and non-volatile memory. In non-volatile memory (e.g., NAND flash memory), one way to increase memory density is by using a vertical memory array, which is also referred to as a three-dimensional (3-D) array.
Some vertical memory arrays include layers of conductive material (separated by layers of insulating material) that are used to provide electrical connections (e.g., word lines) so that memory cells in the array may be selected for writing or reading functions. These electrical connections with the conductive layers are made in a “staircase” region, which typically resides adjacent to the memory cell region. Memory cells and associated staircase regions are separated into independently accessible memory “blocks”, for example, by forming slits through the conductive and insulating layers and filling the slits with a suitable isolating material (e.g., an electrically insulative oxide material).
During the process of forming independent memory blocks, however, the tops of the memory structures (e.g., memory pillars and associated memory cells) may be damaged, for example, due to contamination from the isolating material used to fill in the slits. Typically, the isolating material is disposed across the entire memory array, thus being disposed on memory cell regions and staircase regions alike. As a result, contacts in the staircase regions may also be negatively impacted by the isolating material.
Reference will now be made to the exemplary embodiments illustrated, and specific language will be used herein to describe the same. It will nevertheless be understood that no limitation of the scope or to specific invention embodiments is thereby intended.